Technical Field
The present disclosure relates to a semiconductor device and a battery voltage measuring method.
Related Art
Conventionally, high voltage is generated by using an assembled battery including plural battery cells that are connected in series (in multiple-stage). Generally, a battery voltage of the battery cell included in the assembled battery is measured by a semiconductor device for measuring a battery voltage and is connected to the assembled battery.
In such semiconductor device for measuring the battery voltage, a technology including an analog level shifter, to which a voltage of a high potential side and a voltage of the low potential side of the battery cell are input, that measures a battery voltage based on a difference between the voltage of the high potential side and the voltage of the low potential side, is known (see for example, Japanese Patent Application Laid-Open (JP-A) No. 2011-232161).
Recently, in the semiconductor devices for measuring battery voltage are required to reduce its number of terminals. In a case in which the numbers of terminals are reduced, package sizes may be reduced, and thus, the devices may be downsized.
However, in the technique disclosed in JP-A No. 2011-232161, in a case in which the number of input terminals to which a voltage corresponding to the battery voltage of the battery cell is input are reduced, a parasitic capacitance occurs, and thus, a voltage corresponding to electric charges accumulated in the parasitic capacitance may result as an error. Accordingly, is the above case, there may be cases in which the battery voltage cannot be accurately measured.